Articole
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1. I. Zagan and V. G. Găitan, "Implementation of nMPRA CPU architecture based on preemptive hardware scheduler engine and different scheduling algorithms," in IET Computers & Digital Techniques, vol. 11, no. 6, pp. 221-230, 11 2017.
https://dx.doi.org/10.1049/iet-cdt.2017.0163
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2. E.-E. Ciobanu, "The Events Priority in the nMPRA and Consumption of Resources Analysis on the FPGA," Advances in Electrical and Computer Engineering, vol.18, no.1, pp.137-144, 2018,
https://dx.doi.org/10.4316/AECE.2018.01017
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3.I. Zagan, "Synthesis analysis and evaluation of hardware scheduler based on different scheduling algorithms," 2018 International Conference on Development and Application Systems (DAS), Suceava, 2018, pp. 18-25,
https://dx.doi.org/10.1109/DAAS.2018.8396064
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4.I. Zagan, C. A. Tănase and V. G. Găitan, "FPGA IMPLEMENTATION OF A CUSTOMIZED PROCESSOR BASED ON RISC-V ARCHITECTURE – CONCEPT AND THEORY OF OPERATION, " ISER 2018 - Proceedings of 148th IASTEM International Conference Italia, 2018. doionline: ISER.19062018.9000.
